1. Field of the Invention
The present invention relates to tab connections made in semiconductor devices and, more particularly, to an improved tab for coupling to a pad on a semiconductor die, which tab includes stress relief elements to improve reliability. The present invention also relates to an improved tab for coupling to a printed circuit board or an insulated metal substrate (IMS).
2. Related Art
In conventional systems, wire-bonds are provided between the die of a semiconductor device and a lead frame for providing electrical connections therebetween. Specifically, one end of a relatively thin conductive wire (for example, a gold, aluminum or copper wire) is soldered or ultrasonically bonded to a pad on the die and the other end of the wire is coupled to a corresponding portion of the lead frame. Such electrical connections are relatively successful in providing reliable interconnection between the die and the lead frame even when numerous thermal cycles are experienced.
Where higher power handling semiconductors are involved, the use of thin wires for interconnecting the die to a higher level of packaging is unsatisfactory due to the high current levels present in such devices. Therefore, the interconnection between the top of the die and lead frame in a high power semiconductor device is typically made using a tab having a relatively wide cross section and a correspondingly large cross sectional area for handling high currents.
A conventional tab used to interconnect the die and the lead frame in a high power semiconductor device is shown in FIG. 1. The tab 10 includes a foot area 12 which is coupled to a semiconductor die 30 using, for example, solder 20. The foot area 12 is relatively large (i.e., covering at least about 25% of the die surface as shown in FIG. 1) for carrying high currents.
Although the tab 10 exhibits superior current carrying capabilities over wire-bonds of relatively thin construction, the large foot area 12 is subject to high thermal stress at the die-tab interface, for example, in the direction shown by the arrow X.
Usually, worst case thermal stress is exhibited when a package cools from an elevated temperature (for example, about 150.degree. C.) to a lower temperature (for example, about 50.degree. C.). During this cooling period, the foot area 12 shrinks and tends to bend the die upwardly. At the same time, a heat spreader (or pad, not shown) tends to bend the die downward. Since the solder 20 is usually the most deformable material involved, it elastically bends up to a point and then begins to creep or fail (i.e., plastic deformation).
The foot area 12 is also subject to thermal stress in the direction perpendicular to direction X and all other directions therebetween. Consequently, prior art tab systems tend to fail after successive thermal cycles.
Further, interconnections made between an electronic semiconductor package and a printed circuit board are typically made using leads which extend from the package to a pad on the printed circuit board. The leads are then connected to the pad, for example, using solder. The lead-pad interface is subject to the same type of thermal stresses described hereinabove with regard to a die-tab interface.
Still further, in some instances a semiconductor package, for example a TO-220 package, is coupled to a heatsink by way of a tab connector such that thermal coupling between the semiconductor package and the heatsink may be achieved. When the tab connector is coupled to the heatsink by way of solder or the like, the tab connector-heatsink interface is also subject to thermal stresses of the type described above.
Therefore, there is a need in the semiconductor packaging art for an interconnecting member capable of carrying high currents for electrically coupling a semiconductor die to a lead frame, a semiconductor package lead to a printed circuit board (or IMS), or a tab connector to a heatsink which is not subject to failure from successive thermal cycling.